Electron Multiplying Low-Voltage CCD With Increased Gain

Stefanov, Konstantin D.; Dunford, Alice and Holland, Andrew D. (2018). Electron Multiplying Low-Voltage CCD With Increased Gain. IEEE Transactions on Electron Devices, 65(7) pp. 2990–2996.

DOI: https://doi.org/10.1109/TED.2018.2839023

Abstract

Novel designs for the gain elements in electron multiplying (EM) CCDs have been implemented in a device manufactured in a low voltage CMOS process. Derived with help from TCAD simulations, the designs employ modified gate geometries in order to significantly increase the EM gain over traditional structures. Two new EM elements have been demonstrated with an order of magnitude higher gain than the typical rectangular gate designs, achieved over 100 amplifying stages and without an increase in the electric field. The principles presented in this work can be used in CMOS and CCD imagers employing electron multiplication in order to boost the gain and reduce undesirable effects such as clock-induced charge generation and gain ageing.

Viewing alternatives

Metrics

Item Actions

Export

You can export this page using these formats Digital Object Identifier - DOI

About

• Item ORO ID
• 55541
• Item Type
• Journal Item
• ISSN
• 0018-9383
• Keywords
• Logic gates; Impact ionization; Electric potential; Charge coupled devices; Aging; Imaging
• Academic Unit or School
• Faculty of Science, Technology, Engineering and Mathematics (STEM) > Physical Sciences
  Faculty of Science, Technology, Engineering and Mathematics (STEM)
• Research Group
• Centre for Electronic Imaging (CEI)
  ?? space ??
• Copyright Holders
• © 2018 IEEE
• Depositing User
• Konstantin Stefanov