Low Voltage Electron Multiplying CCD in a CMOS Process

Dunford, Alice; Stefanov, Konstantin and Holland, Andrew (2016). Low Voltage Electron Multiplying CCD in a CMOS Process. In: Proc. SPIE 9915, High Energy, Optical, and Infrared Detectors for Astronomy VII, 99152Y.

DOI: https://doi.org/10.1117/12.2232635

Abstract

Low light level and high-speed image sensors as required for space applications can suffer from a decrease in the signal to noise ratio (SNR) due to the photon-starved environment and limitations of the sensor’s readout noise. The SNR can be increased by the implementation of Time Delay Integration (TDI) as it allows photoelectrons from multiple exposures to be summed in the charge domain with no added noise. Electron Multiplication (EM) can further improve the SNR and lead to an increase in device performance. However, both techniques have traditionally been confined to Charge Coupled Devices (CCD) due to the efficient charge transfer required. With the increase in demand for CMOS sensors with equivalent or superior functionality and performance, this paper presents findings from the characterisation of a low voltage EMCCD in a CMOS process using advanced design features to increase the electron multiplying gain. By using the CMOS process, it is possible to increase chip integration and functionality and achieve higher readout speeds and reduced pixel size. The presented characterisation results include analysis of the photon transfer curve, the dark current, the electron multiplying gain and analysis of the parameters’ dependence on temperature and operating voltage.

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