Copy the page URI to the clipboard
Boser, Bernhard E.; Säckinger, Eduard; Bromley, Jane; LeCun, Yann; Howard, Richard E. and Jackel, Lawrence D.
(1991).
DOI: https://doi.org/10.1109/IJCNN.1991.155214
Abstract
A high-speed programmable neural network chip and its application to character recognition are described. A network with over 130,000 connections has been implemented on a single chip and operates at a rate of over 1000 classifications per second. The chip performs up to 2000 multiplications and additions simultaneously. Its datapath is suitable particularly for the convolutional architectures that are typical in pattern classification networks, but can also be configured for fully connected or feedback topologies. Computations were performed with 6 bits accuracy for the weights and 3 bits for the states. The chip uses analog processing internally for higher density and reduced power dissipation, but all input/output is digital to simplify system integration
Viewing alternatives
Metrics
Public Attention
Altmetrics from AltmetricNumber of Citations
Citations from Dimensions- Request a copy from the author This file is not available for public download