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Hardware requirements for neural network pattern classifiers: a case study and implementation

Boser, Bernhard E.; Sackinger, Eduard; Bromley, Jane; leCun, Yann and Jackel, Lawrence D. (1992). Hardware requirements for neural network pattern classifiers: a case study and implementation. IEEE Micro, 12(1) pp. 32–40.

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DOI (Digital Object Identifier) Link: https://doi.org/10.1109/40.124378
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Abstract

A special-purpose chip, optimized for computational needs of neural networks and performing over 2000 multiplications and additions simultaneously, is described. Its data path is particularly suitable for the convolutional architectures typical in pattern classification networks but can also be configured for fully connected or feedback topologies. A development system permits rapid prototyping of new applications and analysis of the impact of the specialized hardware on system performance. The power and flexibility of the processor are demonstrated with a neural network for handwritten character recognition containing over 133000 connections.

Item Type: Journal Item
Copyright Holders: 1992 IEEE
ISSN: 0272-1732
Academic Unit/School: Faculty of Science, Technology, Engineering and Mathematics (STEM) > Computing and Communications
Faculty of Science, Technology, Engineering and Mathematics (STEM)
Item ID: 35663
Depositing User: Jane M. Bromley
Date Deposited: 22 May 2013 12:12
Last Modified: 08 Dec 2018 05:29
URI: http://oro.open.ac.uk/id/eprint/35663
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